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Senior Analog IC Designer

Engineering | Sunnyvale, CA | Full Time

Job Description

960 Hamlin Court Sunnyvale, California 94089


Senior Analog IC Designer

About Us:

Kumu Networks is revolutionizing the way wireless and wired systems are built using self-interference-cancellation to enable an innovative full-duplex design that its co-founders developed at Stanford University. In particular wireless full duplex allows a radio to transmit and receive signals at the same time using the same frequency channel. Kumu's patent pending technology changes the basic assumptions on which current wireless radios are built, allowing for improved performance and reduced complexity across a variety of wireless devices and markets. Come help us change the future of wireless!


The Senior Analog IC Design Engineer will be a key contributor to the evolution of Kumu Networks full-duplex technology.  He/she will work with Kumu’s core technology team to drive the miniaturization of self-interference cancellation into integrated circuits.  The ideal candidate will have excellent fundamentals and understand the pros and cons of different analog implementation of a desired function, as well as possess the creativity to use standard components in nontraditional and very innovative ways.  The candidate will also have a deep understanding of different IC technologies (standard CMOS and RFSOI,) and the design flow from concept all the way through to release for production.  


  • Design on-chip blocks such as wide dynamic range OPAMPs, baseband filters, attenuators, summing amplifiers and biasing circuits
  • Create floorplanning or entire layout and assist in on-chip layout
  • Evaluate the designed on-chip circuits in the lab either in hand-or automated measurements
  • Discuss block and system performance with System Engineers
  • Prepare and participate in design, spec and layout reviews


  • Bachelor or Master (preferred) degree in Electrical Engineering with courses in IC design, communications systems and semiconductor technology
  • 5+ years experience in hands-on design of complex chips (e.g. transceivers, wireless sensors, PLLs or convertors)
  • Ability to work and learn in a team
  • Familiar with Cadence Virtuoso design software and Assura
  • Familiar with standard CMOS, CMOS on SOI and BiCMOS technology
  • Familiar with lab test setups using signal analyzers, VNAs, signal generators, digital oscilloscopes, power meters, etc.

Bonus Points:

  • Experience with integrated passives design (IPD)
  • Familiarity with MatLab is a plus
  • Knowledge of Python or C (for test and analysis scripting)
  • Experience with PCB level simulations and layout tools
  • Having worked with field solvers or inductor generators is a bonus


  • Lunch provided daily
  • Sunny, open, collaborative workspace
  • Opportunity to work with great people on fundamentally new technologies


  • Analog, mixed-signal, RF, CMOS, SOC, ADC, PLL, OPAMP, LDO, BG, filter