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Principal RFIC-mm-Wave Designer

Engineering | Sunnyvale, CA | Full Time

Job Description

960 Hamlin Court Sunnyvale, California 94089

Principal Analog RFIC Designer

About Us:

Kumu Networks is revolutionizing the way wireless and wired systems are built using self-interference-cancellation to enable an innovative full-duplex design that its founders developed at Stanford University. In particular wireless full duplex allows a radio to transmit and receive signals at the same time using the same frequency channel. Applying this technology on adjacent channels allows for packing more channels into a given wireless band and improve the performance of filters. Kumu's patent pending technology changes the basic assumptions on which current wireless radios are built, allowing for improved performance and reduced complexity across a variety of wireless devices and markets. Come help us change the future of wireless!

 

Description:

The Principal Analog RFIC Design Engineer will be a key contributor to the evolution of Kumu Networks cancellation technology. He/she will work with Kumu’s core technology team to drive the miniaturization of self-interference cancellation into highly integrated circuits. The ideal candidate will have excellent fundamentals and understand the pros and cons of different RF implementations of a desired function, as well as possess the creativity to apply / modify standard devices in nontraditional and innovative ways. The candidate will also have a good understanding of IC technologies (with RFSOI as priority, FDSOI and SiGe BiCMOS) and the chip design flow from concept all the way through to release for production. The candidate will be the center of competence for the systems, blocks or devices designed by him/her.

 

Responsibilities:

  • Drive the design of on-chip RF blocks like high dynamic range digitally controlled Attenuators and Phase Shifters,   integrated Couplers and Splitters, Baluns, RF switches and Filters / Delays.
  • Generate new circuit topologies and architectures to achieve very challenging system requirements.
  • Create detailed floor-planning or of new design for start of layout and supervise the chip layout.
  • Evaluate the designed on-chip circuits in the lab either with hand- and automated measurements.
  • Discuss block and system performance with System Engineers.
  • Prepare and participate in design, spec and layout reviews

 

 

Requirements:

  • Bachelor with 10+, or Master with 8+ or Ph.D. with 65+ experience  degree in Electrical Engineering with courses in IC design, communications systems and semiconductor technology
  • 5+ years Hands-on experience in hands-on the design of digitally controlled passive RF Phase shifters and attenuators, RF Switches as well as on-chip Couplers, Splitters and Baluns
  • Ability to work and learn in a team
  • Familiarity with Cadence Virtuoso, ADS and Momentum or FEM, Sonnet as well as Helic software
  • Design experience in SOI processes (must have) and familiarity with standard CMOS and BiCMOS technologies (highly desirable)
  • Knowledge of Python or C (for test and analysis scripting)
  • Familiarity with lab test setups using signal analyzers, VNAs, signal generators, digital oscilloscopes and power meters

 

Bonus Points:

  • Experience with IPD (integrated passives devices) technologies
  • Experience with the design of CMOS PAs
  • Familiarity with MatLab
  • Knowledge of Python or C (for test and analysis scripting)
  •  
  • Experience with PCB layout and tools

 

 

Perks:

  • Breakfast and Lunch provided daily
  • Sunny, open, collaborative workspace
  • Opportunity to work with great people on challenging and fundamentally new technologies

 

Keywords; 

RF Phase Shifter,  RF Attenuators, on-chip Couplers and Splitters, Baluns, RF Switches, integrated passive devices (IPD), RF-SOI.