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Analog IC Design Engineer

Engineering | Sunnyvale, CA | Full Time

Job Description

About Us:

Kumu Networks is revolutionizing the way wireless systems are built using an innovative full-duplex wireless design that its co-founders developed in their research at Stanford. Wireless full-duplex allows a radio to transmit and receive signals at the same time using a single frequency channel. Kumu's patent pending full-duplex technology changes the basic assumptions on which current wireless radios are built, allowing for improved performance and reduced complexity across a variety of wireless devices and markets. Come help us change the future of wireless!



The Analog IC Design Engineer will be a key contributor to the evolution of Kumu Networks full-duplex technology. He/she will work with Kumu’s core technology team to drive the miniaturization of self-interference cancellation into integrated circuits. The ideal candidate will have excellent fundamentals and understand the pros and cons of different analog implementations of a desired function, as well as possess the creativity to use standard components in nontraditional and very innovative ways. The candidate will also have a deep understanding of different IC technologies (RF-SOI, (SiGe) BiCMOS and standard CMOS) and the design flow from concept all the way through to release for production.


  • Design on-chip electronic blocks such as baseband and RF amplifiers, attenuators, filters, summing networks, multipliers, convertors and power supplies
  • Plan, create or assist in on-chip layout
  • Evaluate on-chip circuitry, components and systems from hand to automated measurements
  • Discuss block and system performance with System Engineers
  • Prepare and participate in design, spec and layout reviews


  • Bachelor or Master (preferred) degree in Electrical Engineering with courses in IC design, communications systems and semiconductor technology
  • 5+ years experience in hands-on design of complex chips (e.g. transceivers, wireless sensors, convertors)
  • Ability to work and learn in a team
  • Familiar with Cadence chip design software; ADS or AWR a bonus
  • Familiar with CMOS on SOI, BiCMOS and std. CMOS technology
  • Knowledge of Python or C (for test and analysis scripting)
  • Familiar with lab test setups using signal analyzers, VNAs, signal generators, digital oscilloscopes, power meters, etc.


  • Experience with integrated passives design (IPD)
  • Familiarity with MatLab is a plus
  • Experience with PCB level simulations and layout tools


  • Breakfast and lunch provided daily
  • Sunny, open, collaborative workspace (with a ping-pong table and chess set)
  • Opportunity to work with great people on fundamentally new technology